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CAT24C208
Table 1. PIN D ESCRIPTION
Pin Number
1
2
3
4
5
6
7
8
Pin Name
DSP V CC
DSP SCL
DSP SDA
V SS
DDC SDA
DDC SCL
EDID SEL
DDC V CC
Function
Device power from display controller
The CAT24C208 DSP serial clock bidirectional pin is used to clock all data transfers into or out of the
device DSP SDA pin and is also used to block DSP Port access when DDC Port is active.
DSP Serial Data/Address. The bidirectional DSP serial data/address pin is used to transfer data into
and out of the device from a display controller. The DSP SDA pin is an open drain output and can be
wireOR’ed with other open drain or open collector outputs.
Device ground.
DDC Serial Data/Address. The bidirectional DDC serial data/address pin is used to transfer data into
and out of the device from a DDC host. The DDC SDA pin is an open drain output and can be wire ?
OR’ed with other open drain or open collector outputs.
The CAT24C208 DDC serial clock bidirectional pin is used to clock all data transfers into or out of the
device DDC SDA pin, and is used to block DDC Port for access when DSP Port is active.
EDID select. The CAT24C208 EDID select input selects the active bank of memory to be accessed
via the DDC SDA/SCL interface as set in the configuration register.
Device power when powered from a DDC host.
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameters
Temperature Under Bias
Storage Temperature
Voltage on Any Pin with Respect to Ground (Note 1)
V CC with Respect to Ground
Package Power Dissipation Capability (T A = 25 ° C)
Lead Soldering Temperature (10 secs)
Output Short Circuit Current (Note 2)
Ratings
–55 to +125
–65 to +150
–2.0 to +V CC +2.0
–2.0 to +7.0
1.0
300
100
Units
° C
° C
V
V
W
° C
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The minimum DC input voltage is –0.5 V. During transitions, inputs may undershoot to –2.0 V for periods of less than 20 ns. Maximum DC
voltage on output pins is V CC + 0.5 V, which may overshoot to V CC + 2.0 V for periods of less than 20 ns.
2. Output shorted for no more than one second. No more than one output shorted at a time.
Table 3. RELIABILITY CHARACTERISTICS
Symbol
N END (Note 3)
T DR (Note 3)
V ZAP (Note 3)
I LTH (Notes 3 and 4)
Parameter
Endurance
Data Retention
ESD Susceptibility
Latch ? up
Reference Test Method
MIL ? STD ? 883, Test Method 1033
MIL ? STD ? 883, Test Method 1008
JEDEC Standard JESD 22
JEDEC Standard 17
Min
1,000,000
100
2000
100
Units
Cycles/Byte
Years
Volts
mA
3. This parameter is tested initially and after a design or process change that affects the parameter.
4. Latch ? up protection is provided for stresses up to 100 mA on address and data pins from –1 V to V CC +1 V.
Table 4. CAPACITANCE (T A = 25 ° C, f = 1.0 MHz, V CC = 5 V)
Symbol
C I/O (Note 5)
C IN (Note 5)
Parameter
Input/Output Capacitance (Either DSP or DDC SDA)
Input Capacitance (EDID, Either DSP or DDC SCL)
Conditions
V I/O = 0 V
V IN = 0 V
Min
Typ
Max
8
6
Units
pF
pF
5. This parameter is tested initially and after a design or process change that affects the parameter.
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